Finally got around to making up some new boards. Now in RED. Contact me through PM if you want one.
Update: 2015/07/16
The boards are in from manufacture!! I have built one of each and extensively tested the RAM only board.
Here is what the RAM only board looks like Built up And in my 600B This is what you'll need to build one SMBE Parts list
1 - Bare SBME board (supplied)
1 - SMBE-GLU GAL (supplied)
1 - Winbond W24257AK 32k static RAM (or equivalent)
1 - 20-pin DIP socket
1 - 28-pin DIP socket (narrow)
1 - 2N7000 MOSFET
2 - 0.1uF ceramic capacitors
4 - 10-pin female headers with long pins
1 - 3-pin male header
1 - jumper block
They are ready to go out to anyone that wants one. 6 have already gone, so that leaves 4. You can contact me here via PM to get them, or simply go here: http://oms.onebytecpu.com/catalog/vintage.php
Here is what the RAM/EPROM board looks like. Unfortunately there was SNAFU with the silk screen gerber file and the whole thing just got painted white. In any case, you can refer to the layout near the bottom of this post for more information. For building this one I pulled the plastic off the female headers once they were soldered in and cut the contacts off the top of the board. And I used a ZIF socket and a right-angle header for the expansion bus pass -through. I had to solder in the resistor and one of the bypass caps from the bottom to get the ZIF socket on. This is basically what you'll need to build one. SMBE+ Parts list
1 - Bare SBME+ board (supplied)
1 - SMBE+-GLU GAL (supplied)
1 - Winbond W24257AK 32k static RAM (or equivalent)
1 - 2764 EPROM
1 - 20-pin DIP socket
1 - 28-pin DIP socket (narrow)
1 - 28-pin DIP socket (wide)
1 - 2K 1/4 watt resistor
4 - 0.1uF ceramic capacitors
4 - 10-pin female headers with long pins
1 - 20x2 male header
2 - 3-pin male headers
2 - jumper blocks
Update: 2015/06/24
I've gotten my KLyball replica 600D completed and tested. My memory expansion prototype works without error on it in all modes (both as expansion and as the sole memory). I'll be sending both models off for manufacture of a small quantity (10 each) shortly. Once I get them back and build up a sample of each for final test, I'll update all the pictures and code below. I'll also put them up on my website for sale to buyers in the US and Canada. Everyone else can contact me through PM or at the email on my website. The reason for this is that the Paypal checkout cannot correctly calculate shipping outside the US and Canada. The RAM only bare board with a programmed PLD will be $5 + shipping, the RAM/ROM bare board with programmed PLD will be $7 + shipping. Shipping anywhere in the US and Canada will be $5. Other countries will be a bit higher.
Update: 2015/05/04
I'M not having much luck tracking down the source of the errors with the memory board. However, the design is so simple and I have used it successfully before with a Superboard and with various other computer including a SYM-1, and I have also checked it over and over again for shorts or other problems, that now I suspect my Superboard. The memory errors occur in roughly the same blocks in memory. The blocks may only vary by a few bytes here and there. The error rate is also dependent on the CPU used. I get the most errors with a NMOS cpu, far less with and older R65C02, and the fewest using a WDC65C02. The nature of the errors is such that it appears that writing to certain locations causes the data to be written to more than one location. In trying to track down exactly where this happens and what is causing it I found two faults on the Superboard. One memory chip was holding A6 low (so low I am surprised it worked at all) and a bad socket that had a significant resistance in one pin (~5K ohms), however, these problems did not effect the memory errors. Right now I have a program running to try to determine where/how these errors are being caused, but it is taking a long time to run. In any case, I have a set of Klyball's replica boards, so I am working hard to get the 600D replica up and running to test the memory board prototype on that. At this point I'm just waiting on some of the harder to find parts.
Update: 2015/04/25
Okay, back from both my trips, but I have some troubling news. For some very strange and odd reason, I am having random errors on the expansion card. This is driving me nuts as the basic design is taken from the expansion module I created about a million years ago. The only change is using the PLD for glue, which should make things even better as it's faster than the gates and 74LS138 I used before. I mean, this is butt simple!!! Next step is to scope the 5V bus for noise. Even if I see nothing, I'll use more 0.1uF caps and remove the ferrite bead on the supply line (even though it worked in the stone age!). Any and all suggestions welcome!
Update: 20015/03/08
Things continue to progress.
I have added the ability to locate the RAM at $0000 or $2000 on both boards as suggested by Steve Gray. I thought this was a good idea and will help out those who have only 4K, no memory or non-functioning mmemory. Just make sure the ram on the main board is removed, and you will get 32K of RAM.
I recently noticed that the is a hole in the MB between the expansion connector and keyboard that is used to mount the 600 board into a C1P cabinet. right now, both of my layouts cover that hole, so I'm going to have to re-do them. No big deal, but I'm not going to be able to get to it for a little while as I'm going on vacation on the 13th and have much to do before I go.
Update: 20015/02/22
Things have progressed and now there are two board designs.
This is the unit with RAM and EPROM. There is a pair of jumpers to chose between ram only (for a total of up to 40K) or up to 32K of RAM (for a total of 32K) and 8K of EPROM. With this one I have changed the pass-through expansion connector to a dual-inline 40-pin header. This will allow the use of far more common 40-pin IDC connectors. The DD line is split and run through the PLD to allow logically 'OR-ing' the DD signal from any further I/O with that of the memory board itself. The incoming DD line has a 2K pull-up to facilitate OR tying other I/O using open collector devices or small transistors. With this final version, I added some configurable jumper points so that small traces can be cut so that other signals can be potentially brought out the Expansion connector. Here are the schematic and layout.
This was supposed to be how the silk screen looked, but something weird happened when DipTrace wrote the gerber file. You can see the result in the pictures at the top of this post. You will need to use this layout for proper assembly.
Here's the code for the RAM/EPROM board.
Code: Select all
Name SBME_PLUS_GLU ;
PartNo 002 ;
Date 7/21/2015 ;
Revision 01 ;
Designer Bill ;
Company BOP ;
Assembly SBME+ ;
Location ;
Device g16v8a ;
/* *************** INPUT PINS *********************/
PIN 2 = A15 ; /* Address from CPU */
PIN 3 = A14 ; /* Address from CPU */
PIN 4 = A13 ; /* Address from CPU */
PIN 5 = Phi2 ; /* Phase 2 clock */
PIN 6 = !WE ; /* R/W from CPU */
PIN 7 = SEL ; /* RAM/EPROM or RAM only */
PIN 8 = !DDI ; /* Data Direction In */
PIN 9 = LCN ; /* RAM Location jumper */
/* *************** OUTPUT PINS *********************/
PIN 12 = !RAM ; /* RAM Chip Enable */
PIN 13 = !OE ; /* Memory Ouput Enable */
PIN 14 = !P2RW ; /* Phase 2 qualified Write Enable */
PIN 15 = EA14 ; /* A14 to Memory */
PIN 16 = EA13 ; /* A13 to Memory */
PIN 17 = !ROM ; /* EPROM Chip Enable */
PIN 18 = !DDO ; /* Data Direction Out */
/*Intermediate Values */
a = LCN & !SEL & (A15 $ (A14 # A13))
# LCN & SEL & !A15 & (A14 # A13)
# !LCN & !A15;
b = SEL & A15 & !A14 & !A13;
/* Output Definitions */
P2RW = Phi2 & WE;
RAM = a;
ROM = b;
OE = (a # b) & Phi2 & !WE;
DDO = DDI # (a # b) & !WE;
EA13 = LCN & (!A15 & A14 & !A13 # A15 & !A14 & !A13)
# !LCN & A13;
EA14 = LCN & (!A15 & A14 & A13 # A15 & !A14 & !A13)
# !LCN & A14;
Here is the board with just RAM. This one has the advantage of being tiny. It allows the 32K of ram to be placed either at $0000 or at $2000.
In the manufactured boards the address are not readily visible. Use this diagram to better see the jumper positions.
And here is the CUPL code for the RAM only board
Code: Select all
Name SBME_GLU ;
PartNo 002 ;
Date 7/16/2015 ;
Revision 01 ;
Designer Bill ;
Company OMS ;
Assembly SBME ;
Location ;
Device g16v8a ;
/* *************** INPUT PINS *********************/
PIN 2 = A15 ; /* Address from CPU */
PIN 3 = A14 ; /* Address from CPU */
PIN 4 = A13 ; /* Address from CPU */
PIN 5 = Phi2 ; /* Phase 2 clock */
PIN 6 = !RW ; /* R/W from CPU */
PIN 7 = LCN ; /* Location jumper */
/* *************** OUTPUT PINS *********************/
PIN 12 = !CE ; /* Memory Chip Enable */
PIN 13 = !OE ; /* Memory Ouput Enable */
PIN 14 = !P2RW ; /* Phase 2 qualified Write Enable */
PIN 15 = EA14 ; /* A14 to Memory */
PIN 16 = EA13 ; /* A13 to Memory */
PIN 17 = DD ; /* Data direction */
/*Intermediate Values */
a = LCN & (A15 $ (A14 # A13))
# !LCN & !A15;
/* Output Definitions */
P2RW = Phi2 & RW;
CE = a;
OE = a & Phi2 & !RW;
DD = a & !RW;
EA13 = LCN & (!A15 & A14 & !A13
# A15 & !A14 & !A13)
# !LCN & A13;
EA14 = LCN & (!A15 & A14 & A13
# A15 & !A14 & !A13)
# !LCN & A14;
Original Post 2015/02/16
So, early yesterday while spending quality time with my 600, I yet again, for the thousandth time, got that dreaded out of memory error. Well, I decided I was tired of seeing that. It's not as though I write huge programs or anything, but a lot of the stuff I do requires numerical arrays. They eat memory quickly, so 8K just evaporates in no time. Anyway, I decided to take off my software nerd cap and put on my hardware nerd cap and put my mind to expanding the memory a little bit. Rummaging through my parts drawers I found a Winbond W24257AK-15 (32k x 8 CMOS SRAM - 15ns), a Lattice GAL16V8D (PLD) for 'glue', some 10-pin stackable headers (all the rage with the Ardu-weenies) and a suitable piece of DIP PCB. The PLD was used to decode the the /CE & /OE, translate the addressing and provide a Phi2 qualified R/W signal. Pin 11 of the 40-pin socket (J1) is jumpered to the adjacent 5V bus. The result ... by 4:00 pm I had 40191 bytes free on a cold boot! The pictures below tell the story. I've included the CUPL code for the PLD. I've not yet done a schematic, but will when I get time.
If anyone is interested, I'd be willing to have a PCB board made up and supply pre-programed PLDs. But I'd have to have at least 9 other people commit to it to make it worth while. Not sure exactly what the cost would be, but if enough people are interested I'll figure it 0ut. Can't see it being much though. The PLDs cost about $2, shipping anywhere in north America is about $5, the rest of the world for under $10, the PCB I'm guessing would be about $10 or less.