C1P Hardware Mod to Reduce Flicker?
Posted: Wed Apr 12, 2023 9:30 pm
The DOS/65 OSI manual lists an interesting hardware modification (listed below). I'm curious if anyone has tried this mod and recommends it or not.
While no hardware changes are required to run DOS/65 on C1P or SBII systems, it is strongly recommended that the following change be made.
The standard C1P and SBII CPU boards include logic to direct the video RAM address bus to the 6502 whenever the 6502 address bus is 110100xxxxxxxxxx (binary). This normally will only happen when the CPU is actually performing reads or writes to the video RAM beginning at $D000. However there are two I/O devices addressed very close to this area. The keyboard array is at $DCxx and the disk controller is at $C0xx. In both cases it is possible that at some time during the Phase 1 portion of a CPU read or write cycle, the address bus may actually be such that the video address bus is switched from the normal video address generator to the CPU. When that happens the screen will flicker. This flicker is harmless but is objectionable. The solution is simple. The 6502 really only needs to address the video RAM during the Phase 2 period of each cycle. During Phase 2 the address bus is guaranteed to be stable and hence will not cause flicker. The modification recommended is to cut the trace going to U56 Pin 2 and place a jumper between U56 Pin 2 and the Phase 2 clock signal from the 6502. Note that in some cases, if the 2114 RAMs used for the video RAM are a bit slow, this modification may not work. In that case replace the RAMs with faster devices.
Users who have modified their CPU board for larger display sizes may have already made similar or conflicting changes to the inputs to U56. Those users should adjust the modification to fit their configuration.